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Application granted granted Critical Publication of US8239740B2 publication Critical patent/US8239740B2/en Assigned to UNITED MEMORIES, INC., SONY CORPORATION reassignment UNITED MEMORIES, INC. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to US11/855,070 priority Critical patent/US7962837B2/en Application filed by Invensas LLC filed Critical Invensas LLC Priority to US13/102,522 priority patent/US8239740B2/en Publication of US20110209033A1 publication Critical patent/US20110209033A1/en Assigned to INVENSAS CORPORATION reassignment INVENSAS CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Original Assignee Invensas LLC Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Active Application number US13/102,522 Other versions US20110209033A1 Google Patents Circuit and technique for reducing parity bit-widths for check bit and syndrome generation for data blocks through the use of additional check bits to increase the number of minimum weighted codes in the hamming code H-matrixĭownload PDF Info Publication number US8239740B2 US8239740B2 US13/102,522 US201113102522A US8239740B2 US 8239740 B2 US8239740 B2 US 8239740B2 US 201113102522 A US201113102522 A US 201113102522A US 8239740 B2 US8239740 B2 US 8239740B2 Authority US United States Prior art keywords bits bit check check bits codes Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US8239740B2 - Circuit and technique for reducing parity bit-widths for check bit and syndrome generation for data blocks through the use of additional check bits to increase the number of minimum weighted codes in the hamming code H-matrix US8239740B2 - Circuit and technique for reducing parity bit-widths for check bit and syndrome generation for data blocks through the use of additional check bits to increase the number of minimum weighted codes in the hamming code H-matrix